Exemplary embodiments relate to a semiconductor memory device and a method of reading data from the same and, more particularly, to a semiconductor memory device including a plurality of planes programmed by using different program methods and a method of reading the semiconductor memory device.
FIG. 1 is a diagram showing the distributions of threshold voltages of planes programmed by using different program methods.
Referring to FIG. 1, a plane programmed using only a single bit program method (that is, the least significant bit (LSB) program method) has two threshold voltage distributions; a threshold voltage distribution corresponding to data ‘1’ and a threshold voltage distribution corresponding to data ‘0’. Here, data ‘11’, indicating that the single bit program operation has been performed, is programmed into the flag cell of the plane.
On the other hand, a plane programmed using a multi-bit program method (that is, the least significant bit (LSB) program and the most significant bit (MSB) program) has three or more threshold voltage distributions. For example, in case where data of 2 bits is programmed into one memory cell, a plane has threshold voltage distributions A, B, C, and D, as shown in the drawing. Here, data ‘10’, indicating that the multi-bit program operation has been performed, is programmed into the flag cell of the plane.
FIG. 2A is a flowchart illustrating a data read method for the least significant bit (LSB) page of a semiconductor memory device.
The read method of the semiconductor memory device including first and second planes is described below with reference to FIGS. 1 and 2A.
Data of the memory cells and the flag cells of the first and second planes is sensed by performing a first read operation using a read voltage RD2 at step L11. It is determined whether the least significant bit (LSB) data of the sensed flag cells is ‘1’ at step L12. Here, if the flag cells of the first and second planes have different data, the data of a flag cell of the second plane is first selected, and a subsequent operation is performed on the second plane. If, as a result of the determination, the least significant bit (LSB) data of the sensed flag cells is determined not to be ‘1’ (that is, determined to be ‘0’), the first and second planes are determined to have been programmed using a multi-bit program method. Next, data of the memory cells of the first and second planes, read by the first read operation, is outputted at step L13.
Meanwhile, if, as a result of the determination at step L12, the least significant bit (LSB) data of the sensed flag cells is determined to be ‘1’, the first and second planes are determined to have been programmed using a single bit program method. Thus, the least significant bit (LSB) data of the memory cells of the first and second planes is sensed by performing a second read operation using a read voltage RD1 at step L14. Next, data of the memory cells of the first and second planes, read by the second read operation, is outputted at step L13.
FIG. 2B is a flowchart illustrating a data read method for the most significant bit (MSB) page of a semiconductor memory device.
The read method of the semiconductor memory device including first and second planes is described below with reference to FIGS. 1 and 2B.
Data of the memory cells and the flag cells of the first and second planes is sensed by performing a first read operation using a read voltage RD2 at step M11. It is determined whether the least significant bit (LSB) data of the sensed flag cells is ‘1’ at step M12. Here, if the flag cells of the first and second planes have different data, the data of a flag cell of the second plane is first selected, and a subsequent operation is performed on the second plane. If, as a result of the determination, the least significant bit (LSB) data of the sensed flag cells is determined not to be ‘1’ (that is, ‘0’), the first and second planes are determined to have been programmed using a multi-bit program method. Accordingly, the data of the memory cells of the first and second planes is read by performing a second read operation using a read voltage RD1 at step M13. Next, data of the memory cells of the first and second planes is read by performing a third read operation using a read voltage RD3 at step M14. The data of the first to third read operations is combined, and multi-bit data of the memory cells of the first and second planes is outputted at step M15.
Meanwhile, if, as a result of the determination at step M12, the least significant bit (LSB) data of the sensed flag cells is determined to be ‘1’, the first and second planes are determined to have been programmed using a single bit program method. Both the data of memory cells of the first and second planes, read by the first read operation, is changed to ‘1’ at step M16. Next, step M15 is performed.
In the above-described known read method of the semiconductor memory device, in case where the first and second planes have been programmed by using different program methods, a read algorithm is determined according to the data of a flag cell of the second plane. Here, the data of a plane programmed using a single bit program method is read by using a multi-bit read algorithm or the data of a plane programmed using a multi-bit program method is read by using a single bit read algorithm.